1. Field of the Invention
The present invention relates to method and apparatus for forming solder bumps on substrates such as silicon wafers for utilization in chip manufacturing in the electronics industry, and this application is a divisional application of our U.S. patent application Ser. No. 11/482,838, filed on Jul. 7 2006 now U.S. Pat. No. 7,632,750 incorporated herein by reference in its entirety.
2. Prior Art
The manufacturer of integrated circuits in the production of semiconductor devices is an evolving field. Their high demand in commerce has required greater speed in their manufacture and further necessitates improvements in environmental control during their manufacture
The current manufacturer of such semiconductor devices is initially accomplished by the deposition of solder at discreet points on a silicon wafer or base carrier. Such production methods to date, are very involved, utilizing complicated automatic manufacturing techniques. For example, U.S. Pat. No. 6,832,747 to Cordes et al, shows a process for utilizing hybrid molds for a molten solder screening process. This process developed a pyramidal shaped cavity for producing solder balls on a substrate.
A further example of the prior art, is shown in U.S. Pat. No. 6,708,872 to Gruber et al. This particular prior art shows a plurality of steps for applying a solder to a substrate, utilizing a variety of steps including alignment plates and associated procedures therewith which makes the process somewhat complicated.
It is an object of the present invention to overcome the disadvantages of the prior art.
It is a further object of the present invention, to provide a method and an apparatus for applying a solder to a substrate, in an environmentally safe arrangement not shown or suggested by the prior art.
It is yet a further object of the present invention, to minimize the number of steps by the apparatus utilized in the production of a silicon substrate having solder bumps thereon.